Vivado Simulator and Test Bench in Verilog | Xilinx FPGA Programming Tutorials

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Название	:	Vivado Simulator and Test Bench in Verilog \| Xilinx FPGA Programming Tutorials
Продолжительность	:	9.04
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Кадры Vivado Simulator and Test Bench in Verilog | Xilinx FPGA Programming Tutorials

Описание Vivado Simulator and Test Bench in Verilog | Xilinx FPGA Programming Tutorials

Коментарии Vivado Simulator and Test Bench in Verilog | Xilinx FPGA Programming Tutorials

Grady you're very good but you need to drink less coffee before doing a demo with Vivado You're going at warp speed and some of us can only go at sub-light speed Trying to take notes, during your presentation, is an exercise in frustration to the extreme
Comment from : @michaelsteadman7973

you give me d4epression
Comment from : @sarah2lol

im facing with this issue in vivado with my design"ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors" The messages read "[USF-XSim-62]" and "[Vivado 12-4473]" Any ideas on how to fix this would be awesome!
Comment from : @selvapriya1380

Thanks so much for the tutorial! You told us that when writing the testbench, we should change the inputs to registers and outputs to wires What do inouts map to?
Comment from : @user-fq1up1qb4d

Hello, Vivado Can you perform 3D simulations like TINA does? To visualize the signal circuit in IC or FPGA development environments
Comment from : @SirioAstarot

Great lecture, awesome demonstration Thank you
Comment from : @user-weird

didi you know how to make SISO 4bit
Comment from : @ainnadihah216

Can't you just enter your testbench inputs/outputs in the window you closed at 2:59? Or do you just prefer to copy and paste from your module?
Comment from : @derekcarson5550

Thank you very much bro very good video, ı'm a electronic enginner and People need these kinds of videos to improve themselves Thank you again, I'm a big follower
Comment from : @israfiltasc9704

My vivado don't synthesis, it takes hours and nothing :c
Comment from : @DavidGameplaysMex

Great tut's thanks! hope you make more tuts
Comment from : @codingvietnam

Moved along very quickly, simpler example would be better
Comment from : @marshalstewart7776

Thanks for short video but very helpful
Comment from : @mahdigoshtasebi598

k maps and logic minimization please! Great tut's thanks!
Comment from : @freeelectron8261

I don't know if you are still active making these tutorials but if you are I just like to say that I would very much have liked the video more and it would have been a lot easier to follow if the visual tempo wasen't so very fast I don't know maybe it's just me but the speed of the pop-ups and changes on the screen makes it really hard to follow along even when the things you do are very basic stuff that I know of already I don't suggest slowing it down to real time but maybe by 25, the video wouldn't have to be any longer or maybe a little(I know nothing about making videos) but it would be a lot easier to follow along
Comment from : @davidrichard1744

I also think that minimization examples would be amazing!
Comment from : @davidrichard1744

Helpful intro to simulation! I've been looking for beginner intros to FPGAs and Vivado Keep up the good work! Do you have a user group/forum as well for questions/ideas?
Comment from : @KennethLafond007

Hey there! While playing with the simulator I keep running into the same error message and for the life of me I cannot figure what is wrong "ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors" The messages read "[USF-XSim-62]" and "[Vivado 12-4473]" Any ideas on how to fix this would be awesome! Thank you so much for the helpful videos too!
Comment from : @jackcoleman2295

Minimization examples would be amazing!
Comment from : @jackcoleman2295